A CCD, in general, comprises a body of a semiconductor material, such as single crystalline silicon, having -a channel region in and along a surface of the body. A layer of an insulating material, typically silicon dioxide, is on the surface of the body and over the channel region. A plurality of conductive gate electrodes, typically of doped polycrystalline silicon, are on the insulating layer and extend across the channel region. The gate electrodes are positioned along the entire length of the channel region.
In a two phase CCD, the gate electrodes are arranged in two sets which alternate along the channel region. The gate electrodes of one set are connected to a first phase potential, and the gate electrodes of the other set are connected to a second phase potential. Such a two phase CCD also typically includes in the body, a barrier region under an edge of each of the gate electrodes and extending across the channel region. The barrier regions prevent the charge from moving backwards along the channel region.
The two sets of gate electrodes could be formed from a single layer of the doped polycrystalline silicon by depositing the single layer and defining it by photolithography and etching to form the spaced gate electrodes along the channel region. However, using commercial type photolithographic and etching techniques and equipment, it is difficult to form the gate electrodes having very narrow spacing therebetween with the spacing being uniform across the entire width of the gate electrodes. Since relatively wide and/or non-uniform spacings can form potential barriers between the gate electrodes, they can interfere with the transfer of charge from one gate electrode to the next. Therefore, it has been the practice to form the gate electrodes from two separate levels (layers) of polycrystalline silicon. For a two level system, a first layer of polycrystalline silicon is deposited and defined to form one set of the gate electrodes. The first set of gate electrodes is covered with a layer of an insulating material, typically silicon dioxide. A second layer of polycrystalline silicon is then deposited over the first set of gate electrodes and the spaces between the first set of gate electrodes. The second layer of polycrystalline silicon is then defined to form the second set of gate electrodes which are between the gate electrodes of the first set. Also, each of the gate electrodes of the second set overlaps the adjacent gate electrodes of the first set. Since the gate electrodes overlap each other, there are no gaps therebetween which can form undesirable potential barriers. However, the two level gate electrode system is relatively complex in structure and requires two deposition steps, two definition steps and an oxidation step. Therefore, it would be desirable to have a method of making a two phase gate electrode system from a single layer of polycrystalline silicon.